1 ? fn8181.2 caution: these devices are sensitive to electrosta tic discharge; follow proper ic handling procedures. 1-888-intersil or1-888-468-3774 | intersil (and design) is a registered trademark of intersil americas inc. xdcp is a trademark of intersil americas inc. copyright intersil americas inc. 2005, 2008. all rights reserved all other trademarks mentioned are the property of their respective owners. x93155 digitally controlled potentiometer (xdcp?) the intersil x93155 is a digitally controlled potentiometer (xdcp). the device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. the wiper position is controlled by a 3-wire interface. the potentiometer is implemen ted by a resistor array composed of 31 resistive elements and a wiper switching network. the position of the wiper element is controlled by the cs , u/d , and inc inputs. the position of the wiper can be stored in nonvolatile memory and then be recalled upon during a subsequent power-up operation. the device is connected as a two-terminal variable resistor and can be used in a wide variety of applications including: - bias and gain control - lcd contrast adjustment pinout x93155 (8 ld msop) top view features ? solid-state potentiometer ? up/down interface ? 32 wiper tap points per potentiometer - wiper position stored in nonvolatile memory and recalled on power-up ? 31 resistive elements per potentiometer - temperature compensated - maximum resistance tolerance 25% - terminal voltage, 0 to v cc ? low power cmos -v cc = 5v 10% - active current, 200a typ. - standby current, 2.0a max ? high reliability - endurance 200,000 data changes per bit - register data retention, 100 years ?r total value = 50k ? packages - 8 ld msop ? pb-free available (rohs compliant) v cc cs inc u/d r h v ss 1 2 3 4 8 7 6 5 r l nc * *nc can be left unconnected, or connected to any voltage between v ss and v cc. ordering information part number part marking v cc limits (v) r total (k ) temp range (c) package pkg dwg. # X93155UM8I* agm 5 10% 50 -40 to +85 8 ld msop m8.118 X93155UM8Iz* (note) dch -40 to +85 8 ld msop (pb-free) m8.118 *add "t1" suffix for tape and reel. please refer to tb347 for details on reel specifications. note: these intersil pb-free plastic packaged products employ special pb-free material sets; molding compounds/die attach materi als and 100% matte tin plate plus anneal - e3 terminatio n finish, which is rohs compliant and compat ible with both snpb and pb-free solderin g operations. intersil pb-free products are msl classified at pb-free peak reflow temperatures that meet or exceed the pb-free requirements o f ipc/jedec j std-020. data sheet february 19, 2008
2 fn8181.2 february 19, 2008 block diagram 5-bit up/down counter 5-bit nonvolatile memory store and recall control circuitry one of decoder resistor array r h u/d inc cs transfer gates thirty v cc v ss r l control and memory up/down (u/d ) increment (inc ) device select (cs ) v cc (supply voltage) v ss (ground) r h general detailed 0 1 2 28 29 30 31 two r l 30k pin descriptions msop symbol brief description 1inc increment (inc ) . the inc input is negative-edge triggered. toggling inc will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the u/d input. 2u/d up/down (u/d ) . the u/d input controls the direction of the wiper movement and whether the counter is incremented or decremented. 3r h r h . the r h and r l pins of the x93155 are equivalent to the end terminals of a variable resistor. 4v ss ground. 5nc no connection (or can be connected to any voltage between v ss and v cc .) 6r l r l . the r h and r l pins of the x93155 are equivalent to the end terminals of a variable resistor. 7cs chip select (cs ) . the device is selected when the cs input is low. the current count er value is stored in nonvolatile memory when cs is returned high while the inc input is also high. after the st ore operation is complete, the x93155 will be placed in the low power standby mode until the device is selected once again. 8v cc supply voltage. x93155
3 fn8181.2 february 19, 2008 absolute maximum rati ngs thermal information voltage on cs , inc , u/d , r h , r l and v cc with respect to v ss . . . . . . . . . . . . . . . . . . . . . . . . . . -1v to +6.5v maximum resistor current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2ma recommended operating conditions temperature range industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40c to +85c supply voltage v cc . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5v 10% (note 6) temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65 c to +135 c storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65c to +150c maximum reflow temperature (40s) . . . . . . . . . . . . . . . . . . . . +240c pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below http://www.intersil.com/pbfree/pb-freereflow.asp caution: do not operate at or near the maximum ratings listed fo r extended periods of time. exposure to such conditions may adv ersely impact product reliability and result in failures not covered by warranty. notes: 1. absolute linearity is ut ilized to determine actual wiper resi stance versus expected resistance = (r h(n) (actual)-r h(n) (expected)) = 1 ml maximum. n = 1 .. 29 only 2. relative linearity is a measure of the error in step size between taps = r h(n+1) ?[r h(n) + ml] = 0.5 ml, n = 1 .. 29 only. 3. 1 ml = minimum increment = r tot /31. 4. typical values are for t a = +25c and nominal supply voltage. 5. limits established by characteri zation and are not production tested. 6. when performing multiple write operations, v cc must not decrease by more than 150mv from its initial value. 7. parts are 100% tested at +25c. over-temperature limi ts established by characterization and are not production tested. potentiometer specifications over recommended operating condi tions, unless otherwise stated. symbol parameter test conditions/notes min (note 7) typ (note 4) max (note 7) unit r tot end-to-end resistance 37.5 50 62.5 k v r r h , r l terminal voltages 0 v cc v power rating r total = 50k 1mw (note 5) noise ref: 1khz -120 dbv (note 5) i r potentiometer current (note 5) 0.6 ma resolution 3% absolute linearity (note 1) r h(n)(actual) -r h(n)(expected) 1 mi (note 3) relative linearity (note 2) r h(n+1) -[r h(n)+mi ]0.5mi (note 3) r total temperature coefficient (note 5) 35 ppm/c c h /c l /c w potentiometer capacitances see ?circuit #2 spice macro model? on page 4 10/10/25 pf (note 5) dc electrical specifications over recommended operating conditi ons unless otherwise specified. symbol parameter test conditions min (note 7) typ (note 4) max (note 7) unit i cc1 v cc active current (increment) cs = v il , u/d = v il or v ih and inc = 0.4v @ max. t cyc 200 300 a i cc2 v cc active current (store) (eeprom store) cs = v ih , u/d = v il or v ih and inc =v ih @ max. t wr 1400 a i sb standby supply current cs = v cc - 0.3v, u/d and inc = v ss or v cc - 0.3v 2.0 a i li cs v cs = v cc 1 a x93155
4 fn8181.2 february 19, 2008 test circuit #1 circuit #2 spice macro model i li cs v cc = 5v, cs = 0 120 200 250 a i li inc , u/d input leakage current v in = v ss to v cc 1 a v ih cs , inc , u/d input high voltage v cc x 0.7 v cc + 0.5 v v il cs , inc , u/d input low voltage -0.5 v cc x 0.1 v c in (note 5) cs , inc , u/d input capacitance v cc = 5v, v in = v ss , t a = +25c, f=1mhz 10 pf dc electrical specifications over recommended operating conditi ons unless otherwise specified. (continued) symbol parameter test conditions min (note 7) typ (note 4) max (note 7) unit endurance and data retention parameter min unit minimum endurance 200,000 data changes per bit data retention 100 years v l test point v h /r h ac conditions of test input pulse levels 0v to 5v input rise and fall times 10ns input reference levels 1.5v c h c l 10pf 10pf r h r total c w 25pf r l ac electrical specifications over recommended operating conditi ons, unless otherwise specified. symbol parameter min (note 7) typ (note 4) max (note 7) unit t cl cs to inc setup 100 ns t ld inc high to u/d change 100 ns t di u/d to inc setup 100 ns t ll inc low period 1 s t lh inc high period 1 s t lc inc inactive to cs inactive 1 s t cph cs deselect time (no store) 250 ns t cph cs deselect time (store) 10 ms t cyc inc cycle time 2 s t r , t f (note 5) inc input rise and fall time 500 s t r v cc (note 5) v cc power-up rate 1 50 v/ms t wr store cycle 510ms x93155
5 fn8181.2 february 19, 2008 ac timing power-up and power-down requirements there are no restrictions on the power-up or power-down conditions of v cc and the voltages applied to the potentiometer pins provided that v cc is always more positive than or equal to v h and v l , i.e., v cc v h, v l . the v cc ramp rate specification is always in effect. pin descriptions r h and r l the r h and r l pins of the x93155 are equivalent to the end terminals of a variable resistor. the minimum voltage is v ss and the maximum is v cc . the terminology of r h and r l references the relative position of the terminal in relation to wiper movement direction selected by the u/d input. up/down (u/d ) the u/d input controls the direction of the wiper movement and whether the counter is incremented or decremented. increment (inc ) the inc input is negative-edge triggered. toggling inc will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the u/d input. chip select (cs ) the device is selected when the cs input is low. the current counter value is stored in nonvolatile memory when cs is returned high while the inc input is also high. after the store operation is complete, the x93155 will be placed in the low power standby mode until the device is selected once again. principles of operation there are three sections of the x93155: the input control, counter and decode section; the nonvolatile memory; and the resistor array. the input co ntrol section operates just like an up/down counter. the output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. under the proper conditions the contents of t he counter can be stored in nonvolatile memory and retained for future use. the resistor array is comprised of 31 individual resistors connected in series. at either end of the array and between each resistor is an electronic switch that tr ansfers the connection at that point to the wiper. the wiper is connected to the r l terminal, forming a variable resistor from r h to r l . the wiper, when at either fi xed terminal, acts like its mechanical equivalent and does not move beyond the last position. that is, the counter does not wrap around when clocked to either extreme. if the wiper is moved several positions, multiple taps are connected to the wiper for up to 10s. the 2-terminal resistance value for the device can temporarily change by a significant amount if the wiper is moved several positions. when the device is powered-down, the last wiper position stored will be maintained in the nonvolatile memory. when power is restored, the contents of the memory are recalled and the wiper is set to the value last stored. instructions and programming the inc , u/d and cs inputs control the movement of the wiper along the resistor array. with cs set low, the device is selected and enabled to respond to the u/d and inc inputs. high to low transitions on inc will increment or decrement (depending on the state of the u/d input) a five bit counter. the output of this counter is decoded to select one of thirty two wiper positions along the resistive array. the value of the counter is stored in nonvolatile memory whenever cs transitions high while the inc input is also high. in order to avoid an accidental store during power-up, cs must go high with v cc during initial power-up. when left open, the cs pin is internally pulled up to v cc by an internal 30k resistor. the system may select the x93155, move the wiper and deselect the device without havi ng to store the latest wiper cs inc u/d t ci t il t ih t cyc t id t di t ic t cph t f t r 10% 90% 90% (store) x93155
6 fn8181.2 february 19, 2008 position in nonvolatile memory. after the wiper movement is performed as previously described and once the new position is reached, the system must keep inc low while taking cs high. the new wiper position will be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. in order to recall the stored position of the wiper on power-up, the cs pin must be held high. this procedure allo ws the system to always power-up to a preset value stored in nonvolatile memory; then during system operation, minor adjustments could be made. the adjustments might be based on user preference, system parameter changes due to temperature drift, or other system trim requirements. the state of u/d may be changed while cs remains low. this allows the host system to enable the device and then move the wiper up and down until the proper trim is attained. symbol table applications information electronic digitally controlled (xdcp) potentiometers provide three powerful application advantages: 1. the variability and reliability of a solid-state potentiometer 2. the flexibility of computer-based digital controls 3. the retentivity of nonvolatil e memory used for the storage of multiple potentiometer settings or data mode selection cs inc u/d mode l h wiper up l l wiper down h x store wiper position h x x standby current l x no store, return to standby l h wiper up (not recommended) l l wiper down (not recommended) waveform inputs outputs must be steady will be steady may change from low to high will change from low to high may change from high to low will change from high to low don?t care: changes allowed changing: state not known n/a center line is high impedance v r two terminal variable resistor. i x93155
7 fn8181.2 february 19, 2008 low voltage high impedance instrumentation amplifier micro-power lcd contrast control single supply variable gain amplifier + - u1a 10k 50k - + u1c gain = 50k 10k 1 + 50k r total ) ( u1 = lt1467 v out 50k - + u1b 10k 50k 50k x93155 (r total ) 10k + 10k - v in 5v + - u1a 100k 300k - + u1b 1 + 100k 50k + r total ) ( u1 = lmc6042 v out = -4.41 -15v 100k x93155 (r total ) 240k 5v 100k 5v 50k v out = -8.82v to -13.23v gain = r total 10k + - u1 20k 5v 20k 5v v out u1 = lmc6042 10k v in x93155 (r total ) x93155
8 all intersil u.s. products are manufactured, asse mbled and tested utilizing iso9000 quality systems. intersil corporation?s quality certifications ca n be viewed at www.intersil.com/design/quality intersil products are sold by description only. intersil corpor ation reserves the right to make changes in circuit design, soft ware and/or specifications at any time without notice. accordingly, the reader is cautioned to verify that data sheets are current before placing orders. information furnishe d by intersil is believed to be accurate and reliable. however, no responsibility is assumed by intersil or its subsidiaries for its use; nor for any infringements of paten ts or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of intersil or its subsidiari es. for information regarding intersil corporation and its products, see www.intersil.com fn8181.2 february 19, 2008 x93155 mini small outline pl astic packages (msop) notes: 1. these package dimensions are wi thin allowable dimensions of jedec mo-187ba. 2. dimensioning and tolerancing per ansi y14.5m - 1994. 3. dimension ?d? does not include mold flash, protrusions or gate burrs and are measured at datum plane. mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side. 4. dimension ?e1? does not includ e interlead flash or protrusions and are measured at datum plane. interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side. 5. formed leads shall be planar wi th respect to one another within 0.10mm (0.004) at seating plane. 6. ?l? is the length of terminal for soldering to a substrate. 7. ?n? is the number of terminal positions. 8. terminal numbers are shown for reference only. 9. dimension ?b? does not include dambar protrusion. allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of ?b? dimension at maximum ma terial condition. minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch). 10. datums and to be determined at datum plane . 11. controlling dimension: millimeter. converted inch dimen- sions are for reference only. l 0.25 (0.010) l1 r1 r 4x 4x gauge plane seating plane e e1 n 12 top view index area -c- -b- 0.20 (0.008) a b c seating plane 0.20 (0.008) c 0.10 (0.004) c -a- -h- side view b e d a a1 a2 -b- end view 0.20 (0.008) c d e 1 c l c a - h - -a - - b - - h - m8.118 (jedec mo-187aa) 8 lead mini small outline plastic package symbol inches millimeters notes min max min max a 0.037 0.043 0.94 1.10 - a1 0.002 0.006 0.05 0.15 - a2 0.030 0.037 0.75 0.95 - b 0.010 0.014 0.25 0.36 9 c 0.004 0.008 0.09 0.20 - d 0.116 0.120 2.95 3.05 3 e1 0.116 0.120 2.95 3.05 4 e 0.026 bsc 0.65 bsc - e 0.187 0.199 4.75 5.05 - l 0.016 0.028 0.40 0.70 6 l1 0.037 ref 0.95 ref - n8 87 r 0.003 - 0.07 - - r1 0.003 - 0.07 - - 05 o 15 o 5 o 15 o - 0 o 6 o 0 o 6 o - rev. 2 01/03
|
